Silent Debuggers Is A WIP

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programming:asm:huc6280_instruction_set [2020/05/09 16:45] – [Set Decimal Mode Flag (SED)] turboxrayprogramming:asm:huc6280_instruction_set [2020/07/25 05:18] (current) – ↷ Page moved from programming:programming:asm:huc6280_instruction_set to programming:asm:huc6280_instruction_set arkhan
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-//* The following is an automated conversion of an excellent document originally available here: [[http://shu.emuunlim.com/download/pcedocs/pce_cpu.html]]//+//* The following is a conversion of the document (with corrections) originally available here: [[http://shu.emuunlim.com/download/pcedocs/pce_cpu.html]]//
 ===== The HuC6280 CPU ===== ===== The HuC6280 CPU =====
  
-The PC-Engine uses a special version of the well-known 6502 CPU, apparently mimicking Rockwell's 65C02S variant. It has additional Opcodes, more addressing-modes, and a memory management unit (MMU). Page boundary penalties does not exist on the HuC6280, but it's speculated that it is automatically calculated for some instructions, as some are +1 over non-penalty 6502 versions. This is a list of Opcodes, that are available with the HuC6280 CPU.+The PC-Engine uses a special version of the well-known 6502 CPU, apparently mimicking Rockwell's 65C02S variant. It has additional Opcodes, more addressing-modes, and a memory management unit (MMU). Page boundary penalties does not exist on the HuC6280, but it's speculated that it is automatically calculated for some instructions, as some are +1 over non-penalty 6502 versions. This is a list of Opcodes, that are available with the HuC6280 CPU. Any instructions that read/write from the hardware bank $ff for address range $000 to $7ff have a +1 cycle penalty, +2 if it's a read-modify-write instruction (TSB, TRB). ST0/ST1/ST2 instruction already have the +1 cycle penalty included in their listing, so no need to add it.  
  
 ===== Add With Carry (ADC) ===== ===== Add With Carry (ADC) =====
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 ===== Set T Flag (SET) ===== ===== Set T Flag (SET) =====
  
-Function The T flag in the status register is set to 1. The T flag is called the "Memory Operation Flag;", when this flag is set all the instructions that normally use the A register act differently, I don't know exactly if all the instructions are affected but I'm sure for AND, EOR, OR & ADC. In place of using the A register the instruction use the memory location in ZP pointed by the X register, so for example if you use SET followed by ADC #10, the CPU will do ZP[X] = ZP[X] + 10.+Function The T flag in the status register is set to 1. The T flag is called the "Memory Operation Flag;", when this flag is set all the instructions that normally use the A register act differently, I don't know exactly if all the instructions are affected but I'm sure for AND, EOR, OR & ADC. In place of using the A register the instruction use the memory location in ZP pointed by the X register, so for example if you use SET followed by ADC #10, the CPU will do ZP[X] = ZP[X] + 10. When the T flag is set, operations that work under the T flag will have a Read-Modify-Write +1 penalty.
  
 Adressing Modes & Opcodes Adressing Modes & Opcodes
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 |Addressing Mode|Syntax|Opcode|# of bytes|# of cycles| |Addressing Mode|Syntax|Opcode|# of bytes|# of cycles|
-|Implied|ST0 #nn|03 nn|2|4|+|Implied|ST0 #nn|03 nn|2|5|
  
 Flags Affected Flags Affected
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 |Addressing Mode|Syntax|Opcode|# of bytes|# of cycles| |Addressing Mode|Syntax|Opcode|# of bytes|# of cycles|
-|Implied|ST1 #nn|13 nn|2|4|+|Implied|ST1 #nn|13 nn|2|5|
  
 Flags Affected Flags Affected
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 |Addressing Mode|Syntax|Opcode|# of bytes|# of cycles| |Addressing Mode|Syntax|Opcode|# of bytes|# of cycles|
-|Implied|ST2 #nn|23 nn|2|4|+|Implied|ST2 #nn|23 nn|2|5|
  
 Flags Affected Flags Affected
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 ===== Transfer Alternate Increment (TAI) ===== ===== Transfer Alternate Increment (TAI) =====
  
-Function Execute a memory move where the source address alternates between two addresses, and the destination address increments with each loop cycle. This is an extremely powerful instruction, mainly used for transferring data from the special video memory (e.g., backgrounds, etc.) to the main memory.+Function Execute a memory move where the source address alternates between two addresses, and the destination address increments with each loop cycle. This is an extremely powerful instruction, mainly used for transferring data from the special video memory (e.g., backgrounds, etc.) to the main memory. Blocks interrupts from happening until finished. A/X/Y are pushed onto the stack during the transfer.
  
 Adressing Modes & Opcodes Adressing Modes & Opcodes
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 ===== Transfer Increment Alternate (TIA) ===== ===== Transfer Increment Alternate (TIA) =====
  
-Function Execute a memory move where the source address increments, and the destination address alternates between two addresses with each loop cycle. This is an extremely powerful instruction, mainly used for transferring data to the special video memory (e.g., backgrounds, etc.) from the main memory.+Function Execute a memory move where the source address increments, and the destination address alternates between two addresses with each loop cycle. This is an extremely powerful instruction, mainly used for transferring data to the special video memory (e.g., backgrounds, etc.) from the main memory. Blocks interrupts from happening until finished. A/X/Y are pushed onto the stack during the transfer.
  
 Adressing Modes & Opcodes Adressing Modes & Opcodes
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 ===== Transfer Decrement Decrement (TDD) ===== ===== Transfer Decrement Decrement (TDD) =====
  
-Function Execute a memory move where the source and destination addresses decrement with each loop cycle. This is an extremely powerful instruction, mainly used for copying and moving data around in main memory.+Function Execute a memory move where the source and destination addresses decrement with each loop cycle. This is an extremely powerful instruction, mainly used for copying and moving data around in main memory. Blocks interrupts from happening until finished. A/X/Y are pushed onto the stack during the transfer.
  
 Adressing Modes & Opcodes Adressing Modes & Opcodes
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 ===== Transfer Increment None (TIN) ===== ===== Transfer Increment None (TIN) =====
  
-Function Execute a memory move where the source address increments with each loop cycle. This is an extremely powerful instruction, mainly used for transferring data from the special video memory (e.g., backgrounds, etc.) to the main memory.+Function Execute a memory move where the source address increments with each loop cycle. This is an extremely powerful instruction, mainly used for transferring data to byte wide ports (e.g., PSG, etc.) to the main memory. Blocks interrupts from happening until finished. A/X/Y are pushed onto the stack during the transfer.
  
 Adressing Modes & Opcodes Adressing Modes & Opcodes
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 ===== Transfer Increment Increment (TII) ===== ===== Transfer Increment Increment (TII) =====
  
-Function Execute a memory move where the source and destination addresses increment with each loop cycle. This is an extremely powerful instruction, mainly used for copying and moving blocks of data around in main memory.+Function Execute a memory move where the source and destination addresses increment with each loop cycle. This is an extremely powerful instruction, mainly used for copying and moving blocks of data around in main memory. Blocks interrupts from happening until finished. A/X/Y are pushed onto the stack during the transfer.
  
 Adressing Modes & Opcodes Adressing Modes & Opcodes
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 |N|V|T|B|D|I|Z|C| |N|V|T|B|D|I|Z|C|
 |N|-|0|-|-|-|Z|-| |N|-|0|-|-|-|Z|-|
 +
 +===== Transfer Y Register to Accumulator (TYA) =====
  
 Function Transfer the value in the Y register to the accumulator. The value of the Y register is not changed. Function Transfer the value in the Y register to the accumulator. The value of the Y register is not changed.

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