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programming:asm:huc6280_instruction_set [2020/05/09 16:55] – [Transfer Decrement Decrement (TDD)] turboxrayprogramming:asm:huc6280_instruction_set [2020/07/25 05:18] (current) – ↷ Page moved from programming:programming:asm:huc6280_instruction_set to programming:asm:huc6280_instruction_set arkhan
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-//* The following is an automated conversion of an excellent document originally available here: [[http://shu.emuunlim.com/download/pcedocs/pce_cpu.html]]//+//* The following is a conversion of the document (with corrections) originally available here: [[http://shu.emuunlim.com/download/pcedocs/pce_cpu.html]]//
 ===== The HuC6280 CPU ===== ===== The HuC6280 CPU =====
  
-The PC-Engine uses a special version of the well-known 6502 CPU, apparently mimicking Rockwell's 65C02S variant. It has additional Opcodes, more addressing-modes, and a memory management unit (MMU). Page boundary penalties does not exist on the HuC6280, but it's speculated that it is automatically calculated for some instructions, as some are +1 over non-penalty 6502 versions. This is a list of Opcodes, that are available with the HuC6280 CPU.+The PC-Engine uses a special version of the well-known 6502 CPU, apparently mimicking Rockwell's 65C02S variant. It has additional Opcodes, more addressing-modes, and a memory management unit (MMU). Page boundary penalties does not exist on the HuC6280, but it's speculated that it is automatically calculated for some instructions, as some are +1 over non-penalty 6502 versions. This is a list of Opcodes, that are available with the HuC6280 CPU. Any instructions that read/write from the hardware bank $ff for address range $000 to $7ff have a +1 cycle penalty, +2 if it's a read-modify-write instruction (TSB, TRB). ST0/ST1/ST2 instruction already have the +1 cycle penalty included in their listing, so no need to add it.  
  
 ===== Add With Carry (ADC) ===== ===== Add With Carry (ADC) =====
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 ===== Transfer Increment None (TIN) ===== ===== Transfer Increment None (TIN) =====
  
-Function Execute a memory move where the source address increments with each loop cycle. This is an extremely powerful instruction, mainly used for transferring data from the special video memory (e.g., backgrounds, etc.) to the main memory.+Function Execute a memory move where the source address increments with each loop cycle. This is an extremely powerful instruction, mainly used for transferring data to byte wide ports (e.g., PSG, etc.) to the main memory. Blocks interrupts from happening until finished. A/X/Y are pushed onto the stack during the transfer.
  
 Adressing Modes & Opcodes Adressing Modes & Opcodes
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 ===== Transfer Increment Increment (TII) ===== ===== Transfer Increment Increment (TII) =====
  
-Function Execute a memory move where the source and destination addresses increment with each loop cycle. This is an extremely powerful instruction, mainly used for copying and moving blocks of data around in main memory.+Function Execute a memory move where the source and destination addresses increment with each loop cycle. This is an extremely powerful instruction, mainly used for copying and moving blocks of data around in main memory. Blocks interrupts from happening until finished. A/X/Y are pushed onto the stack during the transfer.
  
 Adressing Modes & Opcodes Adressing Modes & Opcodes
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 |N|V|T|B|D|I|Z|C| |N|V|T|B|D|I|Z|C|
 |N|-|0|-|-|-|Z|-| |N|-|0|-|-|-|Z|-|
 +
 +===== Transfer Y Register to Accumulator (TYA) =====
  
 Function Transfer the value in the Y register to the accumulator. The value of the Y register is not changed. Function Transfer the value in the Y register to the accumulator. The value of the Y register is not changed.

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